1. Technical Field
The present invention relates generally to semiconductor fabrication, and more particularly, to an improved replacement metal gate of a field effect transistor and method of fabrication.
2. Related Art
Complimentary metal-oxide-silicon (CMOS) technology is used in many integrated circuits. CMOS technology utilizes n-channel metal-oxide-silicon field effect transistors (n-MOSFETs) often shortened to NFETs and p-channel metal-oxide-silicon field effect transistors (p-MOSFETs) often shortened to PFETs. Conventional NFETs and PFETs are well known in the art and comprise a source region and a drain region on opposite sides of a channel region formed in single-crystal silicon with a gate electrode formed on top of a gate dielectric layer which is itself formed on top of the channel region.
Some semiconductor devices, such as high performance processor devices, can include millions of field effect transistors. For such devices, decreasing transistors size, and thus increasing transistor density, has traditionally been a high priority in the semiconductor manufacturing industry. It is therefore desirable to have an improved field effect transistor and method of fabrication.